MANUFACTURE OF HIGH-DENSITY INTEGRATED CIRCUIT WITH OXIDE AND POLYSILICON SPACER

PROBLEM TO BE SOLVED: To relax the dimensional limitation in lithograph technology by forming the node of the self-alignment and a bit-line contact by utilizing the first sidewall spacer on an interlayer dielectric film, and forming a capacitor by utilizing the second sidewall spacer on the bit line at the same time. SOLUTION: An interlayer dielectric film 22 is deposited on a matched oxide film 20, formed on the surface of a semiconductor substrate 2. A polysilicon film 24 is deposited on the film 22. Then, the polysilicon film 24 is etched, and an opening is formed. A first side-wall spacer 30 is formed on the side wall of the opening. With the first side-wall spacer 30 and the polysilicon film 24 as masks, the interlayer dielectric film 22 is etched, and contact holes 32 and 34 are formed. These holes 32 and 34 are filled with nodes and bit-line contacts 41 and 40. Furthermore, a second sidewall spacer 56 is formed thereon, and a capacitor is obtained, wherein a lower electrode 60 and an upper electrode film 64 are deposited.