MANUFACTURE OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To provide the manufacture of a semiconductor device which reduces the parasitic capacitance value by the transverse diffusion of a source layer and a drain layer and enables a high-speed operation by forming spacer insulating films between the gate and the source and between the gate and the drain of a MIS-FET. SOLUTION: This manufacturing method is one which forms LOCOS silicon oxide films on both sides of a silicon substrate 2, and forms a pad silicon oxide films 6 between them, and a spacer insulating film 26 around a gate region G, and forms a conductive film (gate electrode) between them. Furthermore, a surface insulating film 16 is formed after formation of a source layer 12 and a drain layer 14 by implanting impurities from the impurity implantation layer 10 and diffusing the impurity implantation layer 10 by heat treatment, and a source electrode 20 and a drain electrode 22 are respectively formed at the surface insulating film 16. The junction face is made to conform to the edge of the gate region G when the diffused layers of source layer 12 and the drain layer 14 have been diffused in the lateral direction.