THREE PHASE CLOCK PULSE GENERATING CIRCUIT

PROBLEM TO BE SOLVED: To provide a three phase clock pulse generating circuit which performs a side panel display on 16:9 wide display element with a simplified peripheral circuit structure. SOLUTION: The output of 1/2 frequency dividing circuit 53 of source oscillation is provided with delay circui...

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Bibliographische Detailangaben
1. Verfasser: TAKAHASHI KIMIYO
Format: Patent
Sprache:eng
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