SYSTEM RESET SYSTEM
PROBLEM TO BE SOLVED: To perform a reset operation in a short time and to grasp the state of a reset mode by announcing previously the reset operation and resetting an entire system after setting the operation of every subsystem in its completely resettable state. SOLUTION: The reset enabling signal...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | PROBLEM TO BE SOLVED: To perform a reset operation in a short time and to grasp the state of a reset mode by announcing previously the reset operation and resetting an entire system after setting the operation of every subsystem in its completely resettable state. SOLUTION: The reset enabling signals 101 and 131 and a reset request signal 11 which are received from a reset enabling register 100 are turned into a reset start signal 111 via an AND, and a reset pulse generation circuit 120 is started. The reset operations can be previously and individually announced to subsystems via an AND secured between the register 100 and a reset previous announcement signal 21. Then the bits of the register 100 and a resettable status register are assigned individually to the subsystems by means of the signal 21 and collectively managed. A system is reset after the operation of every subsystem is grasped and set in a completely resettable state. Thus, the entire system where plural subsystems are connected together is reset. |
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