VARIABLE WIRING CIRCUIT AND LOGICAL INTEGRATED CIRCUIT USING THE WIRING CIRCUIT

PROBLEM TO BE SOLVED: To eliminate the reduction of the operating margin of a circuit of the next stage and also to eliminate a limited number of passable circuits by securing a constitution where the buffer gate circuits are operated based on the stored information and send the signals to the output signal lines. SOLUTION: A variable wiring circuit SB (GSB, LSB) is provided with an input signal line INL and 3 output signal lines OTL1 to OTL3, 3 clocked inverter type buffer gates G1 to G3, and 3 memory cells MC1 to MC3. In such a constitution, the input signals can be sent in one of three directions based on the data stored in the cells MC1 to MC3. Then the signals can be sent in two or three optional directions when '1' is written in 2 or 3 memory cells MC. Thus the circuits G1 to G3 are operated based on the information stored in the cells MC, so that the circuit SB can send the signals to the output signal lines.