FLIP-FLOP CIRCUIT

PROBLEM TO BE SOLVED: To provide a flip-flop circuit which can output the signal equal to an input data signal as an output signal despite non-input of a clock signal in addition to its normal operation to input the input data signal and true clock signal and to output the output data signal respect...

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Bibliographische Detailangaben
Hauptverfasser: KUROGUCHI KATSUMI, FURUKAWA MASAAKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a flip-flop circuit which can output the signal equal to an input data signal as an output signal despite non-input of a clock signal in addition to its normal operation to input the input data signal and true clock signal and to output the output data signal respectively. SOLUTION: A flip-flop circuit consists of the clocked gates 5, 6, 7 and 8 which control the data signals by the clock signals, the inverter circuits 9, 10 and 11, and a clock input decision circuit 4 which decides the input or non- input of the clock signals and outputs these clock signals or the control signals based on its decision result. When the clock signal is inputted, the circuit 4 outputs the clock signals as they are and the flip-flop circuit has its normal operation. If no clock signal is inputted, the circuit 4 outputs the control signals to input them to the gates 5 to 8. As a result, the data signals inputted via a data input terminal 1 are directly transmitted to a data output terminal 3.