COMPARATOR CIRCUIT

PROBLEM TO BE SOLVED: To enable the reception of a differential input signal to satisfy the standard of LVDS by enabling the reception of the differential input signal from a ground potential to a power supply potential even when a power supply voltage is low. SOLUTION: Corresponding to the potential of the differential input signal, the reception of the differential input signal is enabled by a first comparator circuit C1 for receiving the differential input signal at FET P1 and P2 of P channel or/and by a second comparator circuit C2 for receiving the differential input signal at FET N7 and N8 of N channel, the output of the reception disabled comparator circuit is fixed at a high level or a low level by a resistor 2 for pull-up or a resistor 3 for pull-down, the compared results at the respective comparator circuits are suitably delayed by delay circuits 4 and 6, and the logical arithmetic of both compared results is defined as the compared result of the comparator circuit.