SEMICONDUCTOR MEMORY DEVICE WITH WRITE CIRCUIT FOR TEST

PROBLEM TO BE SOLVED: To shorten a data-written state in a testing process of a large-capacity semiconductor memory device by writing/processing data all together in all of memory cells connected to a word line and a pair of bit lines. SOLUTION: Many word lines WL in memory cell arrays 10, 20 are rendered selectable by one operation by many NMOS switching transistors TL. At a test write, all of the word lines WL are simultaneously driven by activating a word line activation signal BIE, and all pairs of bit lines BL, BLB can be connected to all pairs of input/output lines IO, IOB buy activating a high- speed write signal FWE and a separation signal ISO. Moreover, data bits resulting form logic states of data signals A, B, C, D can be written in all of the memory cells. At a normal operation, a data access to the memory cells 10, 20 is carried out in accordance with the word line WL selected by an address, a column selection signal CSL and the separation signal ISO.