MANUFACTURE OF SEMICONDUCTOR DEVICE

PROBLEM TO BE SOLVED: To reduce the cost and time for manufacturing process by sharing a process related to the formation of the impurity region of each transistor. SOLUTION: An ion implantation process for forming an emitter region 23 and an internal base region 21 of an NPN transistor and a base r...

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1. Verfasser: AYABE MASAYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce the cost and time for manufacturing process by sharing a process related to the formation of the impurity region of each transistor. SOLUTION: An ion implantation process for forming an emitter region 23 and an internal base region 21 of an NPN transistor and a base region 22 and a source region 24 of a DMOS transistor, an ion implantation process for forming a drain region 33 and a source region 34 of an NMOS transistor, a collector region 35 of the NPN transistor, and a drain region 35 of the DMOS, and an ion implantation process for forming a drain region 42 and a source region 43 of a PMOS transistor, an external base region 44 of the NPN transistor, and a back gate region 45 o the DMOS transistor are shared, thus reducing the formation process of a resist mask which is used at the time of ion implantation and hence reducing the cost and time related to a manufacturing process.