PHASE LOCKED LOOP CIRCUIT

PROBLEM TO BE SOLVED: To reduce time till phase is locked by monitoring an output of a filter by a voltage comparator and switching 1st and 2nd selectors when a frequency of the output is close to an object frequency. SOLUTION: A phase comparator 1 compares an output frequency fR of a selector 9A with an output frequency fC of a selector 9B and provides an output of an UP pulse U or a DOWN pulse D to the output as a result. Then the pulse U or D is fed to a charge pump circuit 2 and a filter 3 generates a control voltage. The control voltage is given to a variably controlled oscillator VCO 4 changing an oscillating frequency and fed to one terminal of a voltage comparator 6. Furthermore, a 1/N counter 5 counts oscillated frequencies from the VCO 4 and provided an output of 2f/N or f/N. Then the selector 9B is provided to an output side of the counter 5 and the selector 9B selects the frequency 2f/n or f/N depending on a '0' or '1' output in response to a gate potential of the comparator 6 and gives the selected frequency to the other input fC of the comparator 1.