COMPUTER FOR DELAY TIME BETWEEN DESIGNATED NODES IN INTEGRATED CIRCUIT
PROBLEM TO BE SOLVED: To automatically compute the delay time between optional designated nodes, by providing a computer with a delay time outputting means which outputs the delay time between the starting point node and the ending point node, based on the result of the simulation by a circuit simul...
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Zusammenfassung: | PROBLEM TO BE SOLVED: To automatically compute the delay time between optional designated nodes, by providing a computer with a delay time outputting means which outputs the delay time between the starting point node and the ending point node, based on the result of the simulation by a circuit simulator. SOLUTION: A node designating means 1 presents the relation of connection between cells to an operator, and the operator designates the starting point node and the ending point node by a mouth or a keyboard. A course retrieving means 2 retrieves the course between both nodes, based on the layout data L. A cell parasitic element abstracting means 3 abstracts parasitic resistance elements, parasitic capacitive elements, and transistor elements in individual cells on the retrieval course, and a wiring parasitic element abstracting means 4 abstracts the parasitic resistance elements and the parasitic capacitive elements of the wiring between individual cells on the retrieval course. Furthermore, a means 5 makes the not list of the parasitic circuits consisting of the abstracted parasitic elements, and a means 6 makes an input file F for simulation. A circuit simulator 7 performs the simulation based on the input file F, and a delay time output means 8 outputs the delay time between both nodes, based on the result. |
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