ERROR COUNTING CIRCUIT

PROBLEM TO BE SOLVED: To count the number of errors at speed similar to that of input data even if the number of the errors becomes large by adding the number of error data becoming parallel to a prescribed value in an addition part and executing addition on a number larger than the prescribed numbe...

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Hauptverfasser: WATANABE TOMOHARU, OBA TAKAHIRO, KOZUKI TOSHIAKI, SASAKI YOSHIHITO, HIGUCHI HIROKI, HORI MASATO, SHIROSHITA ERIKO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To count the number of errors at speed similar to that of input data even if the number of the errors becomes large by adding the number of error data becoming parallel to a prescribed value in an addition part and executing addition on a number larger than the prescribed number in a counting part. SOLUTION: In the addition part 1, adder outputs transmitted from an adder 11 inputting binarized and n-parallel error data and the Sn terminal-Sn terminal of the adder are set to be the inputs of the flip flop(FF) 12 of n-bits, are set to be the inputs of the Q terminal of FF 12 and the output of the Q terminal of FF 12 is fed back to the Ao terminal of the adder 11. Thus, addition to 2 is executed. The counting part 2 sets a carry output signal outputted when addition exceeds 2 , namely, the output of a CO terminal to be the input of a 2 counter 21 and counting from the (n+1)-th power of 2 to m-th power of 2 is executed.