FAIL-FIRST, FAIL-FUNCTIONAL AND FAULT TOLERANT MULTIPROCESSOR SYSTEM

PROBLEM TO BE SOLVED: To execute the error check of a processor so as not to affect performance at the spot of an interface. SOLUTION: Routers 14A and 14B are connected to sub processor systems 10A and 10B which are one duplex pair of this multiprocessor system and I/O packet interfaces 16A and 16B...

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Hauptverfasser: POORU ENU HINTEITSUKA, DANIERU ERU FUAURAA, DEIBUITSUDO JIEI GAASHIA, SUTEIIBUN EICHI MIRAA, FURANKU EI UIRIAMUSU, JIEFURII AI ISUWANDEII, UIRIAMU EDOWAADO BEIKAA, UIRIAMU PATAASON BANTON, UIRIAMU JIYOERU WATOSON, JIYON DEIIN KOODEINTON, SUUZAN SUTOON MERADEISU, DEIBUITSUDO POORU SOONIA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To execute the error check of a processor so as not to affect performance at the spot of an interface. SOLUTION: Routers 14A and 14B are connected to sub processor systems 10A and 10B which are one duplex pair of this multiprocessor system and I/O packet interfaces 16A and 16B are connected to the routers. Message packets are copied by the routers and sent by a method for ensuring the synchronization of the both of the pair. Since interruption issued from an I/O element is provided with the information of the cause of the interruption and transmitted by the message packet similarly to other information transfer, protection by the CRC(cyclic redundancy check) of the interruption is performed and the need of deciding the cause from a CPU side is eliminated. The message packet sent through the I/O is provided with the information of an originator and a destination and a reception CPU refers to an external source for permitting access to the memory by an access propriety check and conversion (AVT) chart and checks whether or not the access is allowed.