METHOD AND APPARATUS FOR EXECUTION OF INSTRUCTION SEQUENCE

PROBLEM TO BE SOLVED: To improve the system performance of an entire data processing system. SOLUTION: A computer processor is provided with a buffer called a decoded instruction buffer(DIB) and this buffer stores command groups expressing plural instructions which can be parallelly executed. It is possible for each pattern in the DIB group to encode the long instruction of a long decoded instruction(LDI). Simultaneously with the execution of instruction due to a conventional device, a group formatter prepares a pair of LDI and the respective LDI become the alternative codes of a pair of original instruction to be parallelly executed. In the case of constructing the LDI, the group formatter analyzes the depending relation of instructions and instruction standby time. The respective pairs of LDI constructed by the group formatter are preserved in the DIB so that the next excursion of the same pair of instruction can be directly performed from the DIB on all the function units and labor for analyzing the depending relation or standby time can not be required.