TIMING VERIFICATION METHOD

PROBLEM TO BE SOLVED: To provide the method for performing timing verification of high precision at low CPU cost. SOLUTION: Input time data and input waveform round data on a data signal and a clock signal are checked first. Then the respective input waveform round data on the data signal and clock signal are inputted to variables of respective functions to calculate a data signal delay time and a clock signal delay time respectively, and the difference in arrival time between the data signal and clock signal at an internal node of a data holding element in a logic circuit is calculated from the input time data of the data signal and clock signal, and the data signal delay time and clock signal delay time. Then a timing restriction value is compared with the arrival time difference to detect the timing restriction violation of the input time of the data signal and clock signal.