CIRCUIT AND METHOD FOR TESTING OF SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To make the test of a memory of a high band width possible with a test equipment having a low band width by adding a frequency multiplier and a test control unit to the test equipment of the low band width to control it. SOLUTION: This test circuit is provided with the frequency multiplier 100 and the test control unit 200 deciding the number of multiplication of the frequency multiplier according to the frequency multiplier 100 and a mode register 10 in addition to the test circuit of the low band width. Then, a control clock CLK is generated by integer-multiplying an external clock with the frequency multiplier 100. Then, a latency controller 20, a column address generator 30, a column address decoder 40 and an input/output control unit 60 are operated synchronizing with the control clock CLK of a high frequency.