SEMICONDUCTOR DEVICE MANUFACTURING METHOD

PROBLEM TO BE SOLVED: To miniaturize the device and reduce the gate length with suppressing the short-channel effect in the manufacturing method of an insulated gate field- effect transistor with the short channel effect suppressed. SOLUTION: A mask 33 having openings is formed on a semiconductor su...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: TOYOFUKU TAKESHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To miniaturize the device and reduce the gate length with suppressing the short-channel effect in the manufacturing method of an insulated gate field- effect transistor with the short channel effect suppressed. SOLUTION: A mask 33 having openings is formed on a semiconductor substrate 31, the substrate 31 is thermally oxidized through the openings to form a first gate insulating film 35 on the substrate 31. A first conductive film 36a is formed on the side walls of the openings so as to cover these side walls, thereby forming an oxidation-resistive film 37a, this layer 37a is used as a mask to thermally oxidize the substrate 31 to form a second gate insulating film 35b on the film 35a, and second conductive film 38a is formed on the films 35a and 35b in the openings 33c to form gate electrodes including the films 36a and 38a.