VERIFICATION METHOD OF LOGICAL UNIT

PROBLEM TO BE SOLVED: To provide a formal verification method of a logical unit by which a specification including non-deterministic operation can be handled. SOLUTION: The structure description design specification data 112 of a logical unit is converted into the design specification data 124 of a register transfer description (processing 202). This design specification data 124 is converted into operation description design specification data 126 (processing 204). Further, the G state enumeration by an operation description (processing 212), the rewriting by a memory axiom (processing 216), an abstracting (processing 218) are performed, and the design specification data 236 after the abstracting is determined. Pipeline stage number data 114 is defined as an auxiliary input, the F state enumeration by the operation description for external specification data 110 (processing 214) and the abstracting (processing 220) are performed and the external specification data 238 after the abstracting is determined. Whether the design specification data 236 after the abstracting is included in the external specification data 238 after the abstracting or not is proved by using a second extension recursive induction (processing 222).