ATM INTERFACE FOR TIME DIVISION MULTIPLEX HIGHWAY

PROBLEM TO BE SOLVED: To obtain the ATM interface for a time division multiplex highway by which an ATM cell is efficiently sent through the time division multiplex highway. SOLUTION: An FIFO control circuit 25 stores a time slot number for cell transmission designated from an external device throug...

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1. Verfasser: INADA HISASHI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To obtain the ATM interface for a time division multiplex highway by which an ATM cell is efficiently sent through the time division multiplex highway. SOLUTION: An FIFO control circuit 25 stores a time slot number for cell transmission designated from an external device through a bus 31 and provides an output of a transmission gate signal 26 and a reception gate signal 27 in a timing of the time slot. While the transmission gate signal 26 is outputted, data from an outgoing time division multiplex highway 11 are written in a transmission FIFO 16, which sends sequentially cells to an ATM line 12. A cell coming from an ATM line 13 is stored in a respectively FIFO 22 and when the reception gate signal 27 is outputted, the cell is received from the reception FIFO 22 and sent to the incoming time division multiplex highway. A time slot in use is revised depending on traffic to enhance the line utilizing efficiency of the time division multiplex highway.