COLUMN REDUNDANCY METHOD OF SEMICONDUCTOR MEMORY DEVICE AND ITS CIRCUIT

PROBLEM TO BE SOLVED: To obtain a column redundancy circuit small in fuses, excellent in integration and suitable for a high integrated memory. SOLUTION: This embodiment comprises: a program part 148 for storing a column address to be made redundant and generating a relief column address signal bar FCAi in response to this; a comparison part 150 for comparing the relief column address signal bar FCAi with a column address CAi and detecting a logic conformity state; and an output part 152 for generating a redundancy enable control signal bar RENi based on an output signal of the comparison part 150. Fuses f1, f2,... corresponding to logic 1 of the redundancy column address are cut off. The comparison part 150 carries out an exclusive logical sum and, if the bars FCAi and CAi are completely under a reverse logical state, the outputs are all logic 1. With this structure, the fuses are not required for all of the column address CAi and bar CAi and the number of fuses is half reduced.