METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PURPOSE:To enhance a flatness of an insulation film in a manufacturing process of a semiconductor integrated circuit device having DRAMs with a multilayer capacitor. CONSTITUTION:A memory cell 7 of a multilayer capacitor structure is arranged in a recess region formed in a semiconductor substrate 1a...

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Bibliographische Detailangaben
Hauptverfasser: KAJITANI KAZUHIKO, OTORI HIROSHI, KANAI FUMIYUKI, MIYAZAWA KAZUYUKI, KUBO SEIJI, KOIKE ATSUYOSHI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE:To enhance a flatness of an insulation film in a manufacturing process of a semiconductor integrated circuit device having DRAMs with a multilayer capacitor. CONSTITUTION:A memory cell 7 of a multilayer capacitor structure is arranged in a recess region formed in a semiconductor substrate 1a, whereby under condition that a difference in a height of insulation films 12e, 12d of a wire groundwork has beforehand been mitigated, a CMP processing is performed on the semiconductor substrate 1a. Thus, the upper surface of the insulation films 12e, 12f of the wire groundwork is flattened.