SEMICONDUCTOR MEMORY DEVICE AND COLUMN GATING METHOD THEREOF
PURPOSE: To minimize the number of data input/output lines by using a shared- type column gate between array blocks. CONSTITUTION: Based on an array block 2-1 as a reference, an odd number array block and an even number array block on the right side adjacent thereto are caused to have the same bit s...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PURPOSE: To minimize the number of data input/output lines by using a shared- type column gate between array blocks. CONSTITUTION: Based on an array block 2-1 as a reference, an odd number array block and an even number array block on the right side adjacent thereto are caused to have the same bit structure. To perform effective byte-based masking at the time of block writing, blocks corresponding to a high-order byte and a low-order byte of the array block 2-j (j=1 to 8) are arranged in a mixed manner, thus reducing the number of data input/output lines IO. In the column data, only a combination signal DC012 is allocated one per pixel, and a pre-decoder of the remaining column address is shared. Thus, when block writing operation is performed, the number of data input/output lines is limited to the minimum level and effective block writing operation may be performed. |
---|