CIRCUIT DEVICE FOR PHASE LOCKED LOOP

PROBLEM TO BE SOLVED: To provide a circuit device for a phase locked loop provided with advantageous characteristics relating to the speed and step width of frequency change by providing a circuit for generating a reference frequency for a PLL auxiliary circuit for generating an alternate frequency...

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Bibliographische Detailangaben
Hauptverfasser: BUERUNERU NUTSUTSU, HAINTSU RINDERURE, HANSUUEEBERUHARUTO KUREEBERU, HANSU ZAPOTSUTA
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide a circuit device for a phase locked loop provided with advantageous characteristics relating to the speed and step width of frequency change by providing a circuit for generating a reference frequency for a PLL auxiliary circuit for generating an alternate frequency for a PLL main circuit. SOLUTION: The reference frequency fR is generated by a reference circuit 5 and supplied to the PLL auxiliary circuits 1 and 2. The frequency fR is multiplied with the frequency division coefficient of the frequency divider of the PLL main circuit 3 and generates the step width of the circuit 3. A frequency fA1 is generated by the circuit 1 and supplied to the switching element 39 of the circuit 3. Simultaneously with it, the frequency fA1 is compared with fR and controlled again by the output signals of a loop amplifier 12. The frequency fA2 is generated by the circuit 2 settable completely regardless of the circuit 1, supplied to the element 39, compared with fR and controlled again. The circuit 3 outputs the desired frequency of the PLL in a prescribed range as an output frequency fOUT. The reference frequency is stipulated by the circuits 1 and 2 and the minimum step width of the frequency change of the frequency fOUT is simultaneously stipulated by the circuits 1 and 2.