TRANSMITTER

PURPOSE: To perform error correction, to shorten arithmetic processing time accordingly when the group length of a transmission information group A to be transmitted is shortened and to improve transmission efficiency. CONSTITUTION: An encoding circuit part 1 performs a 1-bit BCH error correction en...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: UNO YASUSHI, HISAOKA KUNITOSHI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE: To perform error correction, to shorten arithmetic processing time accordingly when the group length of a transmission information group A to be transmitted is shortened and to improve transmission efficiency. CONSTITUTION: An encoding circuit part 1 performs a 1-bit BCH error correction encoding cyclic arithmetic operation only for the transmission information group A of k' bits among the entire information group C regardless of the group length of the entire information group C, forms a transmission code group V from an inspection group R obtained by that and the transmission information group A and transmits it. A decoding circuit part 2 receives a reception code group U whose data length is shortened, performs a decoding cyclic arithmetic operation only for it and detects the presence/absence of errors. Further, a syndrome group S required for the correction of the error depends on the read of the result from a memory for storing the result of the required cyclic arithmetic operation beforehand. The transmission information group A is variable by a byte unit.