LEVEL CONVERTER OF SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To obtain a level converter for semiconductor memory device which can be suppressed in power consumption and improved in operating speed. SOLUTION: A level converter for semiconductor memory device is provided with a PMOS transistor MP1 which supplies a power supply voltage in accordance with a control clock Kpulb to supply electric power to PMOS transistors 2 and 3 which receive sensed voltages Sas and SasB at their gates. On the ground side, in addition, NMOS transistors MN4 and MN5 which are turned off in accordance with the control clock are provided. Moreover, a PMOS transistor MP6 which is controlled with a delayed control clock which is obtained by delaying the control signal by means of inverters I1 and I2 is provided and transistors MP7, MP8, MN9, and MN10 constituting the inverters which are supplied with electric power from the transistor MP6 are provided between paired output nodes DLAT and DLATB.