PLL DEVICE

PURPOSE: To avoid the disturbance of a clock oscillation frequency by turning the output of a frequency divider to the input of a selector and inputting pulses for pulling out equivalent pulses from the outside to the selection terminal of the selector. CONSTITUTION: When composite synchronous video signals from the outside are inputted, a synchronizing separator circuit 1 separates and outputs horizontal synchronizing signals and vertical synchronizing signals and the horizontal synchronizing signals are inputted to the first input terminal of a phase comparator 2. Then, a voltage controlled oscillator 3 inputs a phase comparison value and outputs the signals (clocks) of a frequency which is N-fold of the horizontal syncronizing signals. The clocks are frequency divided into 1/N in the frequency divider 5, passed through the selector 4 and fed back to the second input terminal of the phase comparator 2. In this case, setting is performed so as to input the pulses for pulling out the equivalent pulses to the input terminal of the pulses for pulling out the equivalent pulses only for the period of becoming irregular and pass through the output of the synchronizing separator circuit 1 when the waveform of the irregular frequency is inputted to the input terminal.