MANUFACTURE OF SEMICONDUCTOR DEVICE

PURPOSE: To enable applying a high program voltage with a control gate electrode, by implanting ions for controlling the threshold value of a transistor, and forming a low concentration diffusion layer of low impurity concentration, in the peripheral region of the control gate electrode of a single...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SHIMIZU SHOJI, NARUGE KIYOMI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE: To enable applying a high program voltage with a control gate electrode, by implanting ions for controlling the threshold value of a transistor, and forming a low concentration diffusion layer of low impurity concentration, in the peripheral region of the control gate electrode of a single layer EPROM. CONSTITUTION: An oxide film 12 is formed on the surface of a substrate 11, N-type impurities are ion-implanted into the forming region of a P channel transistor, and an N well region 13 is formed. Into a control gate electrode forming region, P, As and B are sequentially ion-implanted, and a low concentration diffusion layer 25 is formed, which has the same conductivity type as the control gate electrode and impurity concentration lower than that of the control gate electrode. Next As ions are implanted into a control gate electrode forming region, and a control gate electrode 24 is formed. The gate electrode 33, the source region 43 and the drain region 44 of a P channel transistor and the floating gate electrode 34 of a single layer EPROM are formed.