MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD
PROBLEM TO BE SOLVED: To dispense with a costly doping method and get a manufacture effective in cost for a diode by polishing the second silicon wafer, where the second light doping is performed into a planned thickness after fusion. SOLUTION: A silicon wafer 12 doped lightly is polished into a pla...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | HERUBERUTO GEEBERU FUESUNA GEEBERU |
description | PROBLEM TO BE SOLVED: To dispense with a costly doping method and get a manufacture effective in cost for a diode by polishing the second silicon wafer, where the second light doping is performed into a planned thickness after fusion. SOLUTION: A silicon wafer 12 doped lightly is polished into a planned thickness after fusion to a silicon wafer 1 heavily positively doped. As a result, the series resistance of the silicon wafer 2 lightly negatively doped becomes small as far as possible, for it achieves a minimum of forward voltage, but the planned breakdown voltage is kept. What is more, the reason for use of silicon fusion method at this time becomes that the use of a heavily positively doped silicon wafer with a sufficient thickness for secure handling becomes possible and deep p-doping ceases to be necessary. Accordingly, a diode can be manufactured by a method which is effective in cost, and also a diode of low loss can be manufactured. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH08222744A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH08222744A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH08222744A3</originalsourceid><addsrcrecordid>eNrjZLDydfQLdXN0DgkNclXwd1Nw8fR3cVVw9HOBspCkXRScIhWCQ509FHxdQzz8XXgYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbxXgIeBhZGRkbmJiaMxMWoAjIso2A</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD</title><source>esp@cenet</source><creator>HERUBERUTO GEEBERU ; FUESUNA GEEBERU</creator><creatorcontrib>HERUBERUTO GEEBERU ; FUESUNA GEEBERU</creatorcontrib><description>PROBLEM TO BE SOLVED: To dispense with a costly doping method and get a manufacture effective in cost for a diode by polishing the second silicon wafer, where the second light doping is performed into a planned thickness after fusion. SOLUTION: A silicon wafer 12 doped lightly is polished into a planned thickness after fusion to a silicon wafer 1 heavily positively doped. As a result, the series resistance of the silicon wafer 2 lightly negatively doped becomes small as far as possible, for it achieves a minimum of forward voltage, but the planned breakdown voltage is kept. What is more, the reason for use of silicon fusion method at this time becomes that the use of a heavily positively doped silicon wafer with a sufficient thickness for secure handling becomes possible and deep p-doping ceases to be necessary. Accordingly, a diode can be manufactured by a method which is effective in cost, and also a diode of low loss can be manufactured.</description><edition>6</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>1996</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19960830&DB=EPODOC&CC=JP&NR=H08222744A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19960830&DB=EPODOC&CC=JP&NR=H08222744A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HERUBERUTO GEEBERU</creatorcontrib><creatorcontrib>FUESUNA GEEBERU</creatorcontrib><title>MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD</title><description>PROBLEM TO BE SOLVED: To dispense with a costly doping method and get a manufacture effective in cost for a diode by polishing the second silicon wafer, where the second light doping is performed into a planned thickness after fusion. SOLUTION: A silicon wafer 12 doped lightly is polished into a planned thickness after fusion to a silicon wafer 1 heavily positively doped. As a result, the series resistance of the silicon wafer 2 lightly negatively doped becomes small as far as possible, for it achieves a minimum of forward voltage, but the planned breakdown voltage is kept. What is more, the reason for use of silicon fusion method at this time becomes that the use of a heavily positively doped silicon wafer with a sufficient thickness for secure handling becomes possible and deep p-doping ceases to be necessary. Accordingly, a diode can be manufactured by a method which is effective in cost, and also a diode of low loss can be manufactured.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1996</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLDydfQLdXN0DgkNclXwd1Nw8fR3cVVw9HOBspCkXRScIhWCQ509FHxdQzz8XXgYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbxXgIeBhZGRkbmJiaMxMWoAjIso2A</recordid><startdate>19960830</startdate><enddate>19960830</enddate><creator>HERUBERUTO GEEBERU</creator><creator>FUESUNA GEEBERU</creator><scope>EVB</scope></search><sort><creationdate>19960830</creationdate><title>MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD</title><author>HERUBERUTO GEEBERU ; FUESUNA GEEBERU</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH08222744A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1996</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HERUBERUTO GEEBERU</creatorcontrib><creatorcontrib>FUESUNA GEEBERU</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HERUBERUTO GEEBERU</au><au>FUESUNA GEEBERU</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD</title><date>1996-08-30</date><risdate>1996</risdate><abstract>PROBLEM TO BE SOLVED: To dispense with a costly doping method and get a manufacture effective in cost for a diode by polishing the second silicon wafer, where the second light doping is performed into a planned thickness after fusion. SOLUTION: A silicon wafer 12 doped lightly is polished into a planned thickness after fusion to a silicon wafer 1 heavily positively doped. As a result, the series resistance of the silicon wafer 2 lightly negatively doped becomes small as far as possible, for it achieves a minimum of forward voltage, but the planned breakdown voltage is kept. What is more, the reason for use of silicon fusion method at this time becomes that the use of a heavily positively doped silicon wafer with a sufficient thickness for secure handling becomes possible and deep p-doping ceases to be necessary. Accordingly, a diode can be manufactured by a method which is effective in cost, and also a diode of low loss can be manufactured.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_epo_espacenet_JPH08222744A |
source | esp@cenet |
subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | MANUFACTURE OF DIODE AND DIODE MANUFACTURED BY SUCH METHOD |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T22%3A03%3A24IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=HERUBERUTO%20GEEBERU&rft.date=1996-08-30&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH08222744A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |