CIRCUIT AND METHOD FOR REDUNDANCY OF SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To obtain such a redundant circuit that is useful for mask ROMs and can further shorten the access time at redundant time. SOLUTION: An address inputted through an input buffer 4 is supplied to both a normal decoder 10 and redundant address storing circuit 6. When the address i...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: KOU SOUKI, RI KEIKON, NIN KOUSHIYU
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To obtain such a redundant circuit that is useful for mask ROMs and can further shorten the access time at redundant time. SOLUTION: An address inputted through an input buffer 4 is supplied to both a normal decoder 10 and redundant address storing circuit 6. When the address indicates a defective memory cell, redundant addresses RRO-RRn are generated from the circuit 6 and correcting data RDO-RDn stored in a redundant data storing circuit 8 by using a fuse, etc., are accessed. When the addresses RRO-RRn are generated, in addition, a redundant address summator 14 outputs a route selecting signal SD and the circuit 8 is directly connected to a data outputting buffer 26 through a route selected by means of a data outputting route selecting circuit DES. Namely, the access time can be shortened, because data can be outputted without through the sensing and amplifying operations of a sense amplifier 24.