PROCESSOR WITH TRAPPING FUNCTION

PURPOSE: To provide a processor with a trapping function which can handle a trapping instruction similarly to a branching instruction in a normal processing state without using a save area memory special for the trapping instruction. CONSTITUTION: In the processor device in which a processor decodes and executes an instruction stored in a processor instruction storage memory 40, a bit to discriminate instruction trapping is provided in the bit string of the instruction, and the processor is provided with a trapping bit judging aprt 10 which judges the validity/invalidity of an instruction trapping bit and an address output part 20 for exceptional processing which outputs an exceptional processing address when the instruction trapping bit is valid, and when the instruction trapping bit is valid, the processor jumps to an instruction processing address.