SEMICONDUCTOR MEMORY

PURPOSE: To improve the relief rate of redundant circuits. CONSTITUTION: The semiconductor memory in this invention is provided with a memory cell array in which plural memory cell array blocks (A, B, C, D), each having memory cells arranged in a matrix, are arranged in a matrix and a group of spare...

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1. Verfasser: HARIMA TAKAYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE: To improve the relief rate of redundant circuits. CONSTITUTION: The semiconductor memory in this invention is provided with a memory cell array in which plural memory cell array blocks (A, B, C, D), each having memory cells arranged in a matrix, are arranged in a matrix and a group of spare cells (ab, ac, bd, cd) which includes plural spare cells for coping with the failure of the memory cell between neighboring memory cell array blocks. Since the spare cell group is shared by plural neighboring memory cell array blocks, the spare cells are distributed in response to the defective cell occurring in the memory cell array block.