PULSE GENERATOR

PURPOSE: To provide a pulse generator whose circuit configuration is simple and in which a chip area can be reduced at the time of integration by providing an initialization means, a feedback means and a pulse output means. CONSTITUTION: The initialization means initializes the output pulse signal in response to the first state of a clock signal. The feedback means feeds back the output signal through a feed back input terminal in response to the output pulse signal which is fed back, delays an input signal for prescribed time in response to the output pulse signal which is fed back and substitutes it for the prescribed number of times. Thus, the pulse length of the input signal is expanded and outputted. The pulse output means inverts the output pulse signal of the feedback means in response to the shift of the clock signal from the second state to the first state and terminates the expansion of an output pulse. A PMOS transistor 100 executes the function of the initialization means, a NAND gate 110, inverters 120, 130 and 150, a CMOS transmission gate 160 and a capacitor 180 execute the function of the feedback means and a NAND gate 140 executes the function of the pulse output means.