SEMICONDUCTOR MEMORY

PURPOSE: To achieve a higher speed in access time by turning first and second switch means off in the initial stage with a sense amplifier enabled to speed up a reading operation of a dynamic RAM. CONSTITUTION: Unit circuits of a sense amplifier SA each contain a pair of an N-channel type switch MOS...

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Bibliographische Detailangaben
Hauptverfasser: ITOU NOBUTAKA, KAJITANI KAZUHIKO, SAKOMURA SHIGETOSHI, SUZUKI TSUYUKI, OTORI HIROSHI, NAKAMURA MASAYUKI
Format: Patent
Sprache:eng
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Zusammenfassung:PURPOSE: To achieve a higher speed in access time by turning first and second switch means off in the initial stage with a sense amplifier enabled to speed up a reading operation of a dynamic RAM. CONSTITUTION: Unit circuits of a sense amplifier SA each contain a pair of an N-channel type switch MOSFETNB and an NC (first switch means) and another pair of N-channel type switch MOSFETND and an NE (second switch means) provided separately between complimentary input/output nodes BS0 *- BSn * thereof and complimentary bit wires B00 -B0n * corresponding to a memory array ARY0. Thus, the switch MOSFETNB and the NC of each unit circuit receives a high level of an internal control signal SHI to be turned on selectively thereby making a connection between the complimentary bit wires BI0 *-BIn * of the memory array ARYI selectively.