TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT
PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | UMEMOTO KENJI KISHIGAMI YOSHIAKI |
| description | PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a time table set for each input channel and every time the input state of a test pattern varies. At the same time, the means 4 counts the varying frequency of the pattern input state and calculates a state transition code for each change of the input stage based on the count value (m) and the initial input states 1 and 0 to store these transition codes in a state transition table. Meanwhile a test pattern output means 5 holds the output as it is when the state transition codes are continuous and then inverts the output after the lapse of the corresponding time stored in the time table when the state transition code varies. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JPH0764629A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JPH0764629A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JPH0764629A3</originalsourceid><addsrcrecordid>eNrjZLANcQ0OUQhwDAlxDfJTCHF1dPbw9HNX8HUN8fB3UXDzD1Jw9XF1Dgny9_N0VnAMCPDxdHVRcA0M9QzwdfUL4WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BHgbmZiZmRpaOxkQoAQDvlynQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT</title><source>esp@cenet</source><creator>UMEMOTO KENJI ; KISHIGAMI YOSHIAKI</creator><creatorcontrib>UMEMOTO KENJI ; KISHIGAMI YOSHIAKI</creatorcontrib><description>PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a time table set for each input channel and every time the input state of a test pattern varies. At the same time, the means 4 counts the varying frequency of the pattern input state and calculates a state transition code for each change of the input stage based on the count value (m) and the initial input states 1 and 0 to store these transition codes in a state transition table. Meanwhile a test pattern output means 5 holds the output as it is when the state transition codes are continuous and then inverts the output after the lapse of the corresponding time stored in the time table when the state transition code varies.</description><edition>6</edition><language>eng</language><subject>CONTROL OR REGULATING SYSTEMS IN GENERAL ; CONTROLLING ; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS ; MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS ; PHYSICS ; REGULATING ; TESTING</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950310&DB=EPODOC&CC=JP&NR=H0764629A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76294</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950310&DB=EPODOC&CC=JP&NR=H0764629A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>UMEMOTO KENJI</creatorcontrib><creatorcontrib>KISHIGAMI YOSHIAKI</creatorcontrib><title>TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT</title><description>PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a time table set for each input channel and every time the input state of a test pattern varies. At the same time, the means 4 counts the varying frequency of the pattern input state and calculates a state transition code for each change of the input stage based on the count value (m) and the initial input states 1 and 0 to store these transition codes in a state transition table. Meanwhile a test pattern output means 5 holds the output as it is when the state transition codes are continuous and then inverts the output after the lapse of the corresponding time stored in the time table when the state transition code varies.</description><subject>CONTROL OR REGULATING SYSTEMS IN GENERAL</subject><subject>CONTROLLING</subject><subject>FUNCTIONAL ELEMENTS OF SUCH SYSTEMS</subject><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS</subject><subject>PHYSICS</subject><subject>REGULATING</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>1995</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLANcQ0OUQhwDAlxDfJTCHF1dPbw9HNX8HUN8fB3UXDzD1Jw9XF1Dgny9_N0VnAMCPDxdHVRcA0M9QzwdfUL4WFgTUvMKU7lhdLcDApuriHOHrqpBfnxqcUFicmpeakl8V4BHgbmZiZmRpaOxkQoAQDvlynQ</recordid><startdate>19950310</startdate><enddate>19950310</enddate><creator>UMEMOTO KENJI</creator><creator>KISHIGAMI YOSHIAKI</creator><scope>EVB</scope></search><sort><creationdate>19950310</creationdate><title>TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT</title><author>UMEMOTO KENJI ; KISHIGAMI YOSHIAKI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JPH0764629A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>1995</creationdate><topic>CONTROL OR REGULATING SYSTEMS IN GENERAL</topic><topic>CONTROLLING</topic><topic>FUNCTIONAL ELEMENTS OF SUCH SYSTEMS</topic><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS</topic><topic>PHYSICS</topic><topic>REGULATING</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>UMEMOTO KENJI</creatorcontrib><creatorcontrib>KISHIGAMI YOSHIAKI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>UMEMOTO KENJI</au><au>KISHIGAMI YOSHIAKI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT</title><date>1995-03-10</date><risdate>1995</risdate><abstract>PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a time table set for each input channel and every time the input state of a test pattern varies. At the same time, the means 4 counts the varying frequency of the pattern input state and calculates a state transition code for each change of the input stage based on the count value (m) and the initial input states 1 and 0 to store these transition codes in a state transition table. Meanwhile a test pattern output means 5 holds the output as it is when the state transition codes are continuous and then inverts the output after the lapse of the corresponding time stored in the time table when the state transition code varies.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_epo_espacenet_JPH0764629A |
| source | esp@cenet |
| subjects | CONTROL OR REGULATING SYSTEMS IN GENERAL CONTROLLING FUNCTIONAL ELEMENTS OF SUCH SYSTEMS MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS PHYSICS REGULATING TESTING |
| title | TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-22T01%3A13%3A03IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=UMEMOTO%20KENJI&rft.date=1995-03-10&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3EJPH0764629A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |