TEST PATTERN TEACHING METHOD FOR ELECTRONIC APPLIED EQUIPMENT

PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a...

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Bibliographische Detailangaben
Hauptverfasser: UMEMOTO KENJI, KISHIGAMI YOSHIAKI
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To provide a test pattern teaching method for electronic applied equipment which can automatically regenerate a test pattern including the ON/OFF timing and also can reduce the memory capacity. CONSTITUTION:A test pattern storage means 4 stores the time counted from the start of a test in a time table set for each input channel and every time the input state of a test pattern varies. At the same time, the means 4 counts the varying frequency of the pattern input state and calculates a state transition code for each change of the input stage based on the count value (m) and the initial input states 1 and 0 to store these transition codes in a state transition table. Meanwhile a test pattern output means 5 holds the output as it is when the state transition codes are continuous and then inverts the output after the lapse of the corresponding time stored in the time table when the state transition code varies.