CLOCK REPRODUCING CIRCUIT

PURPOSE:To synchronize reproducing clocks with reception signals even when a preamble is short relating to the clock reproducing circuit of a receiver for receiving intermittently transmitted burst signals or packet signals in digital radio communication. CONSTITUTION:First, an edge extraction means 1 extracts the edge of the reception signal and detects a synchronization timing provided in the reception signal. In the meantime, a reference signal generation means 2 generates plural quasi-reference signals whose phases are different and frequencies are same beforehand and a selective output means 4 selects the quasi-reference signal provided with the phase closest to the synchronization timing provided in the reception signal from the plural quasi-reference signals and outputs it as the clock signal of the receiver. Thus, the clock signal is not gradually synchronized with the synchronization timing provided in the reception signal but is immediately synchronized with the timing relatively closer to the synchronization timing.