SEMICONDUCTOR STORAGE

PURPOSE:To provide a flash memory, which relieves an erase error, by performing an erase operation of a memory cell for a predesignated number as a unit, performing a write operation of the memory cell in the state of erase due to this erase operation by the FN tunnel phenomenon, and providing and erase control circuit to recover its threshold potential to a predetermined value. CONSTITUTION:An erase control circuit EC performs initial settings of erase A address signals EX0-EXi and erase Y address signals EY0-EYi and selects 8 memory cells successively to determine if any them is in the state of an erase error. If in the state of the erase error, it selectively rakes action for the erase error. As a result, a plurality of memory cells MC connected to a word line W0 conduct a write operation through the FN tunnel phenomenon from a substrate part SUB to a floating gate. Its threshold voltage is raised to a predetermined value to reach a threshold voltage of the memory cell MC which has between normally erased. Consequently, the memory cell MC in the state of the erase error is relieved to prevent an inferior write.