MEMORY CONTROLLER

PURPOSE:To provide the memory controller of a computer system which is provided with a cache memory and a frame memory which are capable of maintaining the conformability of display data between the cache memory and the frame memory when the frame memory is updated in the memory controller. CONSTITU...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: MANDA MASAHITO, YAMAMOTO HIROKI, KODA ERIKO, KIMURA SHINJI, KUWANA TOSHIYUKI, NAKAMURA SHOJI, SUGITA YUMIKO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To provide the memory controller of a computer system which is provided with a cache memory and a frame memory which are capable of maintaining the conformability of display data between the cache memory and the frame memory when the frame memory is updated in the memory controller. CONSTITUTION:In the memory controller of a computer system which is provided with a display 15, a frame memory 14 storing the display data of the display 15, an arithmetic unit 11 incorporating a cache memory 12 and generating the display data of the display 15 and a main memory 13, the controller is provided with a means directly writing the display data from the arithmetic unit 11 in the frame memory 14, a means performing a calculation for the display data from the arithmetic unit 11 and writing the data in the frame memory 14 and a means notifying the address of the frame memory 14 where display data is updated to the arithmetic unit 11 when the calculation is performed for the display data from the arithmetic unit 11 and the data is written in the frame memory 14.