APPARATUS AND METHOD FOR CACHE LINE REPLACING

PURPOSE: To read data at high speed, while preventing time delay by storing write-back data in a write-back buffer and simultaneously storing data in a main memory into a read buffer. CONSTITUTION: While the write-back data are stored into a write-back buffer 35, the data read from a main memory 100 to a memory bus 32 are stored in a read buffer 36, and when the write-back data storing is completed, the data in the read buffer 36 are immediately transmitted through a multiplexer 38 to a CPU/cache bus 31. When storing the data into the read buffer 36, a count value is increased by a buffer count register 37, and when reading the data out of the read buffer 36, the count value is decreased. The multiplexer 38 adjusts a data path to be transmitted to the CPU/cache bus corresponding to the value of the buffer count register 37.