POWER RESET CIRCUIT

POWER RESET CIRCUIT

PURPOSE:To prevent such a defect of a data transmitter where the wrong reception output is transmitted according the rise and drop of the power voltage in a power application mode or a power voltage instant drop reset mode. CONSTITUTION:A power reset circuit 4 includes a forced discharge circuit 3 a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: ONO KATSUYA, KAGAMI YUTAKA
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:PURPOSE:To prevent such a defect of a data transmitter where the wrong reception output is transmitted according the rise and drop of the power voltage in a power application mode or a power voltage instant drop reset mode. CONSTITUTION:A power reset circuit 4 includes a forced discharge circuit 3 added to a power ON-mode reset circuit consisting of a capacitor C1, a resistance R1 and a transistor Q1. In such a constitution, the circuit 4 can always operate in a normal state even in a circuit constant setting mode such as a power voltage instant drop reset mode going against a power application mode. Then the unallowable wrong transmission of the reception output is eliminated.