SYSTEM VERIFYING DEVICE AND METHOD
PURPOSE:To improve the working efficiency for verification of the logical matching properties between the request and design specifications. CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of...
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creator | OSUGA AKIHIKO |
description | PURPOSE:To improve the working efficiency for verification of the logical matching properties between the request and design specifications. CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of a system that are described in a readable form to a computer, a verifying part 2 which verifies the logical matching properties between the request and design specifications inputted at the part 1, a verification tracing part 3 which traces the executing state of verification carried out at the part 2 for the logical matching preperties between both request and design specifications, an auxiliary theorem input part 4 where the user inputs a proper theorem as necessary while confirming the executing state of verification performed at the part 3, a verifying state deciding part 5 which decides the necessity of the auxiliary theorem by monitoring the recursive state of specifications, an auxiliary theorem acquiring part 6 which acquires the auxiliary theorem when its necessity is decided at the part 5, and a verification result display part 7 which displays the result of verification carried out at the part 2. |
format | Patent |
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CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of a system that are described in a readable form to a computer, a verifying part 2 which verifies the logical matching properties between the request and design specifications inputted at the part 1, a verification tracing part 3 which traces the executing state of verification carried out at the part 2 for the logical matching preperties between both request and design specifications, an auxiliary theorem input part 4 where the user inputs a proper theorem as necessary while confirming the executing state of verification performed at the part 3, a verifying state deciding part 5 which decides the necessity of the auxiliary theorem by monitoring the recursive state of specifications, an auxiliary theorem acquiring part 6 which acquires the auxiliary theorem when its necessity is decided at the part 5, and a verification result display part 7 which displays the result of verification carried out at the part 2.</description><edition>6</edition><language>eng</language><subject>CALCULATING ; COMPUTING ; COUNTING ; DATA PROCESSING SYSTEMS OR METHODS, SPECIALLY ADAPTED FORADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORYOR FORECASTING PURPOSES ; ELECTRIC DIGITAL DATA PROCESSING ; PHYSICS ; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE,COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORY OR FORECASTINGPURPOSES, NOT OTHERWISE PROVIDED FOR</subject><creationdate>1995</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950804&DB=EPODOC&CC=JP&NR=H07200528A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=19950804&DB=EPODOC&CC=JP&NR=H07200528A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>OSUGA AKIHIKO</creatorcontrib><title>SYSTEM VERIFYING DEVICE AND METHOD</title><description>PURPOSE:To improve the working efficiency for verification of the logical matching properties between the request and design specifications. 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CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of a system that are described in a readable form to a computer, a verifying part 2 which verifies the logical matching properties between the request and design specifications inputted at the part 1, a verification tracing part 3 which traces the executing state of verification carried out at the part 2 for the logical matching preperties between both request and design specifications, an auxiliary theorem input part 4 where the user inputs a proper theorem as necessary while confirming the executing state of verification performed at the part 3, a verifying state deciding part 5 which decides the necessity of the auxiliary theorem by monitoring the recursive state of specifications, an auxiliary theorem acquiring part 6 which acquires the auxiliary theorem when its necessity is decided at the part 5, and a verification result display part 7 which displays the result of verification carried out at the part 2.</abstract><edition>6</edition><oa>free_for_read</oa></addata></record> |
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subjects | CALCULATING COMPUTING COUNTING DATA PROCESSING SYSTEMS OR METHODS, SPECIALLY ADAPTED FORADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORYOR FORECASTING PURPOSES ELECTRIC DIGITAL DATA PROCESSING PHYSICS SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE,COMMERCIAL, FINANCIAL, MANAGERIAL, SUPERVISORY OR FORECASTINGPURPOSES, NOT OTHERWISE PROVIDED FOR |
title | SYSTEM VERIFYING DEVICE AND METHOD |
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