SYSTEM VERIFYING DEVICE AND METHOD

PURPOSE:To improve the working efficiency for verification of the logical matching properties between the request and design specifications. CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of...

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1. Verfasser: OSUGA AKIHIKO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To improve the working efficiency for verification of the logical matching properties between the request and design specifications. CONSTITUTION:This system verifying device and method is provided with a specification input part 1 where a user inputs the request and design specifications of a system that are described in a readable form to a computer, a verifying part 2 which verifies the logical matching properties between the request and design specifications inputted at the part 1, a verification tracing part 3 which traces the executing state of verification carried out at the part 2 for the logical matching preperties between both request and design specifications, an auxiliary theorem input part 4 where the user inputs a proper theorem as necessary while confirming the executing state of verification performed at the part 3, a verifying state deciding part 5 which decides the necessity of the auxiliary theorem by monitoring the recursive state of specifications, an auxiliary theorem acquiring part 6 which acquires the auxiliary theorem when its necessity is decided at the part 5, and a verification result display part 7 which displays the result of verification carried out at the part 2.