DIRECT MEMORY ACCESS CONTROLLER, COMPUTER SYSTEM AND METHOD FOR CONTROL OF DIRECT MEMORY ACCESS OPERATION

PURPOSE: To provide a direct memory access controller which executes a memory access cycle and an I/O access cycle to perform DMA transfer. CONSTITUTION: In the memory access cycle, the address position of a system memory 106 to be accessed is driven onto an address designation line of a local bus 110. In the I/O access cycle, an address value within a DMA constitution address range is driven into an address line on the local bus 110. The DMA constitution address range is the range of the address value where a constitution register of a DMA controller 102 is mapped for the purpose of receiving initialization data. Another peripheral device 108 which can be connected to the local bus 110 doesn't respond to the I/O access cycle. An address disable signal to disable the address decoder of another I/O peripheral device which is not related to DMA transfer is unnecessary. A subsystem to respond to a special DMA protocol is unnecessary.