LEVEL COMPARATOR AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING SAME

PURPOSE:To make a falling time and a rising time nearly equal to each other in a high voltage circuit with respect to different power supply voltages used in the circuit. CONSTITUTION:A basic circuit section comprising a couple of PMOS transistors(TRs) 11, 12 and a couple of NMOS TRs 13, 14 is provi...

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Bibliographische Detailangaben
Hauptverfasser: UTO SHINYA, ASAMI FUMITAKA, SEKI FUSAO
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PURPOSE:To make a falling time and a rising time nearly equal to each other in a high voltage circuit with respect to different power supply voltages used in the circuit. CONSTITUTION:A basic circuit section comprising a couple of PMOS transistors(TRs) 11, 12 and a couple of NMOS TRs 13, 14 is provided with an additional circuit section making a rising time and a falling time of an output signal nearly equal to each other that comprises switch elements 17, 19 turned on/off with a mode signal and NMOS TRs 16, 18 set respectively to the parallel connection state/parallel connection release state by the NMOS TRs 13, 14 depending on the on/off.