COMPUTER SYSTEM AND INTERRUPTION CONTROLLER

PURPOSE: To provide a computer system provided with a peripheral device capable of asserting interruption request signals and an interruption controller provided with at least one interruption request line suited for reducing power consumption for receiving the interruption request signals. CONSTITUTION: This interruption controller 20 is provided with a control circuit 118 capable of generating microprocessor interruption signals INT in response to the assertion of the interruption request signals IR0 -IR1 and an under- processing register 124 for storing data for displaying whether or not a specified interruption request is under a processing at present by a microprocessor. A power management unit 10 is connected to the output line of the under- processing register 124 and controls clock signals or power supplied to this computer system by the data stored inside the under-processing register 124.