FACSIMILE EQUIPMENT

PURPOSE:To reduce the deterioration in picture when received information is reduced at a receiver side specifying the difference of transfer times of each transfer information to a predetermined or below at reduction recording. CONSTITUTION:A clock generating circuit 32 outputs e.g. 20MHz clock BCLK...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: USHIDA KATSUTOSHI, YOSHIDA TAKEHIRO, HASHIMOTO KENJI, KATAOKA JUNNOSUKE, KOMADA YASUO, NAKAYAMA TORU, NISHIOKA KOJI, KADOKURA YUSUKE
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To reduce the deterioration in picture when received information is reduced at a receiver side specifying the difference of transfer times of each transfer information to a predetermined or below at reduction recording. CONSTITUTION:A clock generating circuit 32 outputs e.g. 20MHz clock BCLK. In the case of recording at a rate of 8 pel/mm in the main scanning direction, after signals being 1/8 frequency divisions of the BCLK are counted by a number of 40, the same information is outputted in relation to 8 signals BCLK. Upon the detection of a predetermined number of signals BD after the detection of a level 1 of a signal TOP, a picture information processing circuit 34 counts 40 signals DCLK from a timing of a signal BD and then outputs one line of received information by one line and then the processing above is repeated. In the case of nonmagnification, after 40 signals DCLK are counted from a timing of the signal BD, picture information is outputted and even in the case of reduction, similarly after 8X40 signals BCLK are counted after detection of the signal BD and reduced data are outputted. A control circuit 38 samples data based on a 20MHz clock faster than the transfer clock 20MHz/8 by 8 times to control the difference from the transmission times at recording recording into 1/20MHz or below.