DISCRETE COSINE TRANSFORMING UNIT

PURPOSE:To reduce the size of the whole device. CONSTITUTION:This discrete consine transforming unit is provided with a 1st storage means 6a using bit values of the same digit in N data of even-numbered order among 2N input data as addresses and storing the sum of products data between the bit value...

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Hauptverfasser: NAGAMATSU TORU, KIMU RIISATSUPU
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To reduce the size of the whole device. CONSTITUTION:This discrete consine transforming unit is provided with a 1st storage means 6a using bit values of the same digit in N data of even-numbered order among 2N input data as addresses and storing the sum of products data between the bit values and the components of the transformation matrix of the same digits in the addresses, a 2nd storage means 6b using the bit values of the same digit in N data of odd-numbered order as addresses and storing the sum of products data between the bit values and the components of the transformation matrix of the same digits in the addresses, plural inverting means 71, 72 for directly outputting partial data out of data read out from the means 6b in the case of forward transformation, and in the case of reverse transformation, inverting the read data and outputting the inverted data, a 1st cumulative addition means for cumulatively adding data read out from the means 6a, a 2nd cumulative addition means for cumulatively adding remaining data obtained by removing the data added by the 1st cumulative adding means from the data read out from the means 6b and respective outputs from the means 71, 72. Different data between forward transformation and inverse transformation are stored in the 1st storage means 6a and the same data between both the transformation are stored in the 2nd storage means 6b.