JPH069116B

JPH069116B

A semiconductor integrated circuit device has an address decoder which is constructed of a plurality of MOSFETs implemented in a switch tree. The switch tree includes first and second switch tree portions which are controlled 'on' and 'off' by the same input signals. A first swit...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: OOKUBO CHIKAO, TACHIMORI HIROSHI, FUKUDA HIROSHI, FUKAZAWA TAKESHI, TAKAHASHI OSAMU
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRICITY
INFORMATION STORAGE
PHYSICS
PULSE TECHNIQUE
STATIC STORES
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Beschreibung
Zusammenfassung:A semiconductor integrated circuit device has an address decoder which is constructed of a plurality of MOSFETs implemented in a switch tree. The switch tree includes first and second switch tree portions which are controlled 'on' and 'off' by the same input signals. A first switch branch in the first switch tree portion, which is constructed of a comparatively small number of MOSFETs, and a second switch branch in the second switch tree portion, which is constructed of a comparatively large number of MOSFETs, are controlled 'one' and 'off' by the same input signal, while a second switch branch in the first switch tree portion, which is constructed of a comparatively large number of MOSFETs, and a first switch branch in the second switch tree portion, which is constructed of a comparatively small number of MOSFETs, are controlled 'on' and 'off' by the same input signal. This construction is effective to lessen an increase in the number of MOSFETs which are to be coupled to the input lines of the address decoder.