MANUFACTURE OF MOS FIELD-EFFECT TRANSISTOR

PURPOSE:To inexpensively make self-separation for securing a high breakdown voltage and large current, to easily form a concentration gradient between the drain and source of a MOS field-effect transistor, and to optimize the increase in the breakdown voltage and current of the transistor at the tim...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: INAMI NOBUO
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PURPOSE:To inexpensively make self-separation for securing a high breakdown voltage and large current, to easily form a concentration gradient between the drain and source of a MOS field-effect transistor, and to optimize the increase in the breakdown voltage and current of the transistor at the time of manufacturing a transistor. CONSTITUTION:After patterning a gate electrode section 23 which becomes gate silicon 34 on a P-type substrate 20 through a photoetching process, low- concentration N-type layers (ion-implanted layers) 25, 26, and 27 having concentration gradients toward a source are formed by implanting ions from oblique directions while the photoresist of the section 23 are left as it is. Since the ion implantation is performed a plurality of times by changing the implanting angle to 60 deg., 45 deg., 30 deg., etc., the concentration gradients can be easily formed at high densities.