JPH0683049B

PURPOSE:To obtain a circuit which can be connected to an external ECL as it is and is operated with lower electric power in comparison with a device having an internal logic circuit consisting of an ECL, by providing an output buffer using an ECL between an internal logic circuit consisting of an MO...

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Bibliographische Detailangaben
1. Verfasser: URAGAMI KEN
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:PURPOSE:To obtain a circuit which can be connected to an external ECL as it is and is operated with lower electric power in comparison with a device having an internal logic circuit consisting of an ECL, by providing an output buffer using an ECL between an internal logic circuit consisting of an MOSFET and an output terminal. CONSTITUTION:In an internal logic circuit 20 and level converting circuit 34 and 44, CMOSs are used to reduce power consumption. An input buffer 30 and an output buffer 40 using ECLs are inserted between an input terminal Pin and an output terminal Pout and level converting circuits 34 and 33 to perform the interface between ECLs and the CMOS logic circuit. Thus, the circuit can be regarded as a logic circuit consisting of ECLs when viewing the input terminal and the output terminal from the external.